
/*******************************************************************
*
* CAUTION: This file is automatically generated by HSI.
* Version: 
* DO NOT EDIT.
*
* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
*Permission is hereby granted, free of charge, to any person obtaining a copy
*of this software and associated documentation files (the Software), to deal
*in the Software without restriction, including without limitation the rights
*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
*copies of the Software, and to permit persons to whom the Software is
*furnished to do so, subject to the following conditions:
*
*The above copyright notice and this permission notice shall be included in
*all copies or substantial portions of the Software.
* 
* Use of the Software is limited solely to applications:
*(a) running on a Xilinx device, or
*(b) that interact with a Xilinx device through a bus or interconnect.
*
*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 
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* 
* Description: Driver configuration
*
*******************************************************************/

#include "xparameters.h"
#include "xqspipsu.h"

/*
* The configuration table for devices
*/

XQspiPsu_Config XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES] =
{
	{
		XPAR_PSU_QSPI_0_DEVICE_ID,
		XPAR_PSU_QSPI_0_BASEADDR,
		XPAR_PSU_QSPI_0_QSPI_CLK_FREQ_HZ,
		XPAR_PSU_QSPI_0_QSPI_MODE,
		XPAR_PSU_QSPI_0_QSPI_BUS_WIDTH,
		XPAR_PSU_QSPI_0_IS_CACHE_COHERENT
	}
};


